K32W041AM DK6
NXP K32W041AM — Arm Cortex-M4 at 48 MHz, 640 KB flash, 152 KB SRAM, 802.15.4/BLE radio on silicon — on the IOTZTB-DK006 carrier. The behavioural model is hosted and closed-source; this tree carries the board definition, the public memory map and the firmware that runs on it.
Live status
The tables below are a maintained snapshot. Authoritative automation:
Status at a glance
| Aspect | Status |
|---|---|
| Part | NXP K32W041AM (HVQFN40) on the IOTZTB-DK006 carrier |
| Memory map | Flash 640 KB at 0x0000_0000, SRAM_CTRL0 88 KB at 0x0400_0000, SRAM_CTRL1 64 KB at 0x0402_0000, QSPI window 4 MB at 0x1000_0000 |
| Public skeleton | packages/playground/src/boards/k32w041z-public.yaml |
| Playground board id | k32w041amdk6 |
| Built-in demo | firmware/k32w041-m1-demo.elf (sha256 fe41cd54…), runs when nothing is uploaded |
| Model | Hosted labwired-pro; the closed model source is not in this repository |
| Support level | L2 (ci-qualified): smoke, two green CI runs, instruction audit clean, known limitations published |
| Rating | Model ratings — L2, step 987.8 Ir/step, batch 1.6 at interval 1024, RTx 6.50× (above real time) |
Flash / firmware artifact
One Cortex-M4 ELF, linked for the K32W041AM flash map and loaded at address 0. There is no separate bootloader image on this path; the M1 demo and the NXP MCUXpresso SDK 2.6.16 examples are built this way.
| Use | Artifact | Notes |
|---|---|---|
| Built-in demo | ELF, 5.9 KB | Reset cause, 48 MHz clock, USART0 console, RTT, DS2/DS3, watchdog reset |
| Your firmware | Cortex-M4 ELF | Upload in the board window; executes on the hosted runner |
| Vendor examples | NXP SDK 2.6.16 ELFs | Per-peripheral fixtures in the model repository |
The open labwired-cli cannot build this chip: it needs the hosted plugin. Runs go through the Playground board or labwired-pro.
Pins
Carrier devices from UM11393 and the DK6 board header. The Arduino header (CN1–CN4) pin map is not in the public guide, so those sockets are drawn but not wireable.
| Board label | GPIO | Notes |
|---|---|---|
| DS2 | PIO0 | Active low |
| DS3 | PIO3 | Active low |
| BP1 | PIO1 | Active low when pressed |
| J3 pin header | PIO0–PIO21 | 2 × 17 header; see UM11393 |
| ISP_ENTRY (SW2) | PIO5 | Not a free pin |
| USART0 TXD | PIO8 | Debug console (SDK pin_mux) |
| USART0 RXD | PIO9 | Debug console |
Support matrix
| Mark | Meaning |
|---|---|
| ✅ | Good enough for real drivers and the demos we ship |
| ⚠️ | Present but partial, timing-simplified, or test-only |
| ❌ | Not simulated — use the bench |
Core, boot, memory
| Block | Status | Notes |
|---|---|---|
| Cortex-M4, NVIC, SysTick | ✅ | Instruction audit clean over 200 k steps |
| Memory map, SRAM_CTRL0/1, QSPI window | ✅ | Matches data sheet and NXP linker scripts |
| SYSCON / ASYNC_SYSCON / PMC clocks | ✅ / ⚠️ | Main, async, WDT, RTC and PWM clocks; crystal lock time and deep sleep not modelled |
| Boot ROM APIs | ⚠️ | ROM_GetFlash only |
| Flash controller | ⚠️ | Program/erase and CPU stores work; ECC, protection, config lock, OTA remap not modelled |
Pins, GPIO, interrupts
| Block | Status | Notes |
|---|---|---|
| IOCON, GPIO PIO0–PIO21 | ✅ | Function select, pulls, invert, open drain |
| PINT, GINT0, INPUTMUX | ✅ / ⚠️ | Edge/level/pattern interrupts; some trigger muxes stored only |
| Pad electrical behaviour | ❌ | No slew, hysteresis, input filter or analog levels |
Console, buses, timers, DMA
| Block | Status | Notes |
|---|---|---|
| FLEXCOMM USART0/1 | ✅ / ⚠️ | TX/RX FIFOs, flow control, DMA; parity/framing, auto-baud, multi-drop not modelled |
| FLEXCOMM I2C0/1 | ✅ / ⚠️ | Master/slave transfers; no arbitration loss or monitor mode |
| FLEXCOMM SPI0/1 | ✅ / ⚠️ | Master/slave; wire clock phase/polarity not modelled |
| CTIMER0/1, RTC, PWM, WWDT | ✅ | Match/interrupt, capture, PWM, alarm/wake, watchdog reset |
| DMA0 | ✅ / ⚠️ | Descriptor model, 19 channels, peripheral pacing; INPUTMUX triggers not modelled |
Analog, audio, IR, security
| Block | Status | Notes |
|---|---|---|
| ADC0 | ✅ / ⚠️ | Sequence A, thresholds, interrupts; analog levels from stimuli |
| RNG | ✅ | Seeded, deterministic |
| AES0 / SHA0 | ✅ | Cipher/hash paths exercised by vendor examples |
| SPIFI + 4 MB QSPI flash | ✅ / ⚠️ | Commands and memory window; serial timing instantaneous |
| OTPC | ✅ / ⚠️ | Read port; fuse image only when supplied |
| DMIC0 | ⚠️ | FIFO, level interrupt and DMA channel work; samples are silent (no PDM source), filters not modelled |
| HWVAD | ❌ | Registers only; never fires |
| CIC_IRB | ✅ | Envelope FIFO, carrier-period timing, interrupts; IR pin waveform not rendered |
| ISO7816 | ❌ | Register file only; Contact UART protocol not modelled |
| BLE_DP_TOP / radio | ❌ | Antenna register only; BLE and 802.15.4 link layer absent |
What it catches vs what needs a bench
Sim is strong for: boot and reset paths, clock-tree bring-up, USART/I2C/SPI/GPIO drivers, timer and watchdog logic, DMA descriptors, flash program/erase flow, crypto, deterministic CI on unmodified NXP examples.
Still use silicon for: RF, analog levels, microphone PDM, IR LED/carrier, card traffic, power modes, flash endurance and production sign-off.
See Fidelity, Hardware-sim parity, Run limits.
How to run
Playground (hosted)
Open https://app.labwired.com/?board=k32w041amdk6. With nothing uploaded, Run executes the built-in demo. To run your own image, click the board, use the upload icon, pick a Cortex-M4 ELF, then Run again. The board window shows the USART0 console and RTT on the Serial tab; DS2/DS3 light when PIO0/PIO3 are driven low.
Model validation (private)
The closed model lives in a separate repository and is exercised with labwired-pro against unmodified NXP SDK examples: the M1 demo, flash, USART/I2C/SPI/DMA, CTIMER/RTC/PWM/WWDT, ADC/pin interrupts, AES/SHA/SPIFI/OTPC, DMIC and CIC IR. A daily CI job runs the chip tests, the delivered demo and the unsupported-instruction audit against the model's main branch. That harness is not part of this tree; public runs use the Playground above.
Related systems & examples
- NXP K32W041A/K32W041AM product data sheet, Rev. 1.2
- NXP UM11485 (K32W041 user manual) and UM11393 (IOTZTB-DK006 board guide)
- NXP MCUXpresso SDK 2.6.16 for K32W041AMDK6 (SVD committed as
fixtures/k32w041z-svd/K32W041AM.xml, BSD-3-Clause) - M1 test package: boot,
hello_world, watchdog reset, RTT