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ST7735R TFT

Sitronix ST7735R 1.8″ 128×160 RGB565 TFT over 4-wire SPI.

Live catalog

Prefer labwired_describe with the catalog id over guessing pins or addresses.

Status at a glance

Aspect Status
Catalog id st7735
Bus SPI (4-wire, D/C pin)
Address / select cs_pin + dc_pin (required)
Source configs/devices/st7735.yaml (declarative display, no Rust model)
Datasheet Sitronix ST7735R V0.2 (2009-08-05): §9.4.1, §9.6, §9.9.3, §9.11, §9.15.1, §10.1
Tier smoke-proven (crates/core/tests/everyday_display_set.rs)

Pins / attachment

Pin / net Role
SCK / MOSI SPI clock / data
CS Chip select (cs_pin)
D/C (A0) Data / command (dc_pin)
VCC/GND Power (powered: false darkens the panel)

Support matrix

Behavior Status Notes
CASET / RASET / RAMWR (2Ah/2Bh/2Ch) ✅ 16-bit big-endian window, clamped to 127/159 per MV
MADCTL MY / MX / MV (36h) ✅ Moves the address map and the window clamp
SLPIN/SLPOUT, DISPON/DISPOFF, INVON/INVOFF ✅ lit = DISPON and awake
SWRESET (01h) ✅ Per reset table 9.15.1: frame memory and MADCTL kept
CS pause mid-blit ✅ §9.6: the stream resumes
COLMOD (3Ah) ⚠️ Consumed; the model is RGB565 throughout (reset value is 18-bit)
GM = "00" 132×162 glass ❌ Different strap; not this descriptor
Gamma, LUT, partial, idle, tearing, reads ❌ Consumed as unlisted opcodes

The tree also has a hand-written ST7735R colour decoder (st7735_color.rs, the PyBadge path). That decoder is separate and unchanged; this page describes the catalog part.

How to run

  1. Place the part and an MCU in Playground, or add it to a system YAML:
    external_devices:
      - id: "tft"
        type: "st7735"
        connection: "spi1"
        config: { cs_pin: "PA4", dc_pin: "PA3" }
    
  2. Agent: labwired_list → labwired_describe id=st7735 → wire → labwired_validate → labwired_run / labwired_verify.
  3. Smoke: cargo test -p labwired-core --test everyday_display_set. It checks the reset flags, SLPOUT/DISPON/INVON, and that a MADCTL whose parameter is 0x2C does not open RAMWR. It then writes four RGB565 pixels through CASET 2..3 / RASET 4..5 / RAMWR and checks each lands big-endian at its address with every other byte blank. The negative control requires the check to FAIL against a panel that reads all 0x00 or all 0xFF.

Limitations

  • Out-of-range CASET/RASET values are clamped to the edge; the datasheet says such data is ignored.

See the YAML header for the full datasheet trace and every named approximation.